We pointed out last week the critical role 28-nm silicon process technologies are playing in defining ARM architectures in 2010. Jim Clifford, Qualcomm’s senior vice president and general manager of CDMA Technologies (pictured here), sat down with us this week to tell us that not all 28-nm processes are created equal – and to show that packaging innovations like “Through-Silicon Stacking” (a subset of through-silicon via technology) can be as important as silicon feature size.
First, for those of you unfamiliar with the “size matters” mantra, the tinier the minimum feature size is in a modern chip manufacturing plant, the better potential for faster processors, smaller chips, and chips that use less power. Hence, access to tiny feature sizes can determine who can develop the best chip sets for smartphones, smartbooks, and virtually any other consumer product. While chip suppliers keep coming up with new tricks to reduce the size possible using standard light-based photolithography, there’s a feeling in the industry that 28 nm may represent the end of the line (though there are a few brave experiments in 22 nm). For finer geometry chips, manufacturing plants might have to turn to X-ray and “extreme ultraviolet” lithography, sure to jack the multibillion-dollar price of semiconductor fab plants up further. So chip designers want to squeeze as much as they can from 28 nm.
Clifford said that we should consider 28 nm “a multiple-node technology.” One version using a polysilicon gate is best for low-power applications, and can be applied to baseband chips used in low- and medium-end mobile phones, including midrange smartphones. Another process uses a metal-gate technology called “high-K.” This is the workhorse for the high end. Where a 45-nm metal gate process can yield a Snapdragon processor at 1.2 or 1.3 GHz, turning to a 28-nm process can drive a Snapdragon up to 1.7, perhaps even 2 GHz.
Since Qualcomm has been “a specialist in on-chip integration” since its early days, Clifford said that the company will make maximum use of 28-nm processes not just for ARM acceleration, but for combining Wi-Fi, Bluetooth, GPS, MPEG-4 encode and decode, HDMI, and virtually any other conceivable I/O, into a primary processor architecture. Other ARM licensees may look at multi-chip partitioning, but Qualcomm’s drive to smaller and smaller handheld end-user products means that integration has to be a primary strategy.
And Qualcomm can’t rely solely on processor frequencies to improve ARM performance within Snapdragon. Multicore implementations make the most sense, at least insofar as dual cores are concerned. Server and desktop developers have toyed with quad and even eight-core RISCs on a single chip, but Clifford said the inherent problems encountered with symmetric multiprocessing and multithreading make the advantages of multicore fall off after dual-core devices. For a dual-core Snapdragon, though, offering a dual-core device at a lower frequency almost always will provide better performance at a lower power dissipation than a single-core chip at a higher frequency.
Finally, he said, Qualcomm is seeing some real improvements in memory interfaces by moving from an original Package-On-Package concept for linking chips within a handset, to the more innovative Through-Silicon Stacking, a 3D chip-interconnect project Qualcomm has collaborated on with Belgian research facility IMEC. Originally, Qualcomm’s work in TSS seemed driven to unique display options, but Clifford predicted the advantages in accelerating interfaces between memory and processor may be the application that really makes TSS worth the investment.
Will there be a cost-effective semiconductor process at 22 nm or smaller? Never say never, but Clifford anticipates the Qualcomm 28-nm deals with TSMC and Global Foundries may represent the workhorse for the company for many years to come.
Loring
